Utility Blocks — Simulink utility blocks used in models to provide pre-determined
The following blocks are used inside source
models to be targeted with HDL Coder. They are designed so that you can add them to
your own designs to provide commonly required functional units, and are used in
These blocks can be accessed via the Simulink Library Browser or by entering the
following in the MATLAB command window:
Beat||The Generate one beat block creates data packets to be sent out over
|Extract Latency and
The Extract latency sin block is used to disassemble the packet
created with the Generate one beat block on the receiving
The crc tlast difference block output increases if a packet is
received with an invalid CRC.
This takes an input data and valid signal and generates an axi
stream frame-based signal.
The Receive frame block counts and deconstructs axi stream data
packets received over Aurora links.
|Aurora Send Receive||
This block transforms an input data vector to an AXI stream
frame-based signal for streaming through an Aurora link to a connected FPGA I/O
module. The block also unpacks received frames to a data
|Streaming DMA Frame Assembly||
This block transforms an input data vector and valid signal to an
AXI stream frame-based signal for DMA data streaming to the