A unique module ID must be used for each type of I/O module Setup block in your
The module ID has two functions:
It defines the logical connection to link the I/O module driver blocks
with each other
It also has an impact on the PCI slot auto-search feature: if only one
I/O module is installed, the module ID must be set to 1. If multiple modules are installed, it must
be in the range 1:n. Not all the I/O modules installed in the target
machine need be used
PCI Slot (-1: autosearch)
There are two approaches for mapping the blocks to a specific I/O module installed
in the target machine. All modules of the same kind must be configured using the
Auto-Search: the default value -1
allows the real-time target machine to auto-search for the I/O module.
The priority is defined by the module ID (first vector element for a
multinode). The module with the lowest PCI bus/slot number is assigned
to module ID 1 (or [1 x]) and the next module found is assigned to
module ID 2 (or [2 x]), and so on
Explicit Addressing: the location of the module inside the target
machine can be explicitly defined by using the [BusNumber, SlotNumber]
format. To determine the bus number and the PCI slot number, run the
following command in the MATLAB command window:
Check this box if the I/O module should calibrate itself the next time
a model (target application) is downloaded and initialized. The status
of the calibration is displayed on the target screen. The calibration
takes approximately 0.5 seconds. The calibration is not re-executed
during normal start/stop operation once the target application has been
Warning: During the calibration
process various signals may be present at the output pins, but they will
stay inside the configured voltage range.
This allows a continuous calibration during data acquisition. When
operating in this mode, calibration is performed continuously by
switching the inputs of all channels between the system inputs and the
internal self-test signals. Therefore, one ADC clock is used for the
calibration and the other one for acquisition. If configured as
initiator the ADC clock gets automatically updated. In target mode the
applied external frequency must be twice as fast, to obtain the same
acquisition rate. Note: If enabled, the max ADC clock is limited to
The input range for all A/D channels. This driver does not allow
different ranges for individual channels.
Either 18-bit or 16-bit. By default, the IO112 is delivered with
18-bit A/D converters. To make use of the full 18-bit resolution select
18-bit. If 16-bit is selected, then only the 16 most significant bits
will be transferred to the input FIFO of the IO112. In this case two
16-bit values (channels) are packed into a 32-bit word when the Analog
input or Read channels block (see below) retrieves the converted values
from the IO112. This reduces the driver latency to a certain extent. If
18-bit is selected no data packing applies. If you have the 16-bit
variant of IO112, then always select 16-bit.
Number of Channels
Defines the number of channels to be acquired. The count starts with
the first channel.
Invert Clock and Sync IO
Checking this box will invert the logic levels of the external clock
and sync I/O (pins B38 and B40).
Select either Initiator (default) or
Target. If your real-time target
machine contains a single IO112 I/O module, then Initiator must be selected.
If Initiator is selected, the I/O
module initiates the A/D conversions and outputs a pulse train to
optionally trigger other IO112 I/O modules which have Inter-Module Synchronization set to Target. The pulse train is sent on I/O
connector pin B38 (ground is on pin B37).
If Target is selected, the I/O module
itself does not start its A/D conversions, but rather triggers them
using a pulse train from another IO112 I/O module which has Inter-Module Synchronization set to Initiator. The pulse train is received on pin
B38 (ground is on pin B37). With this setting there must be at least one
other IO112 I/O module present with the Inter-Module Synchronization field set to Initiator, and the modules' B38 and B37 pins
must be physically wired together (pin B38 to pin B38, and pin B37 to
pin B37). To use this feature with more than two IO112 I/O modules, all
the B38 pins must be wired together and all the B37 pins must be wired
together. One IO112 I/O module must be set to Initiator and all the others to Target.
Frame Size, ADC Clock and Sample Time
Parameter dependency is as follows: frame size = sample time × sample
clock. By defining two parameters, an equation will determine the third
parameter automatically, provided the parameter value for the third
parameter is set to "-1". Example: "Frame
Size of "32", Sample
Clock of "44100", and Sample
Time of "-1". Sample
Time is automatically computed to be 0.0007256 seconds.
In other words, this model would execute every 0.0007256 seconds, which
is every 32 samples at 44 kHz.
The number of samples per frame. An interrupt occurs each time the I/O
module acquires a full frame.
The frequency at which the samples are taken. The parameter is in Hz
and must be between 550 and 1000000 (550 Hz to 1 MHz). Note:
The ADC clock is calculated internally by dividing the base clock on the
module by an integer value. This defines the available frequencies. The
calculation is listed on the right-hand side of the ADC Clock field (base clock/clock divider =
External Clock Divider
By writing a value greater than 1 the external clock signal is divided
by the parameter of the external clock divider. Consequently,
high-frequency external clocking signals can be used. If you do not want
to use a divider set this parameter to 1. Note: This feature is not yet
available. Available on I/O module revision E.
The time between frame completions. Note: Sample time can only be a
multiple of ADC clocks.