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The SPI (Serial Peripheral Interface) bus is a  quasi standard for serial synchronous communications over short distances. It is typically used in embedded systems to communicate with sensors, e.g. temperature, pressure, or to control devices.

Speedgoat provide support for SPI master, slave and sniffer.All modules come with driver blocks for Simulink.


This FPGA code module provides SPI

  • Master support
  • Slave support
  • Sniffer support

The code module can function as either master or slave, and multiple slave select lines can be implemented as required. Most typical applications are directly supported. SPI sniffer support allows an existing SPI communication setup to be monitored. Speedgoat offers a customisation service to meet any particular requirements you may have.


SPI FPGA code module timing diagram

Fig.: An example timing diagram of the signal generated / read by the SPI code module

T 1 = Start delay (master only)
T 2 = Clock divider
T 3 = Inter-word delay (master only)
T 4 = Stop delay (master only)

Item ID Product Name Components
  • Simulink blocks and the corresponding VHDL files to use code module functionality in the HDL Coder workflow  
  • Simulink example model 
  • Simulink library for configuration and utility blocks 
  • Comprehensive documentation  
203XXA  Custom Implementation Package 
  • Project-specific FPGA bitstream implemented with the required number of code module channels 
  • Simulink example model 
  • Simulink library  
  • Comprehensive documentation   

This code module is normally delivered as part of a custom implementation with your selection of functionality and I/O count. Please contact us for further information.

Pricing information
We don't publish pricing information on our website. Upon request by e-mail or phone we can provide a complete price list covering our entire product portfolio in various currencies. We recommend that you get in touch with us to discuss your specific needs. We can then quickly provide you with a tailored quotation including technical and pricing information.


Included in delivery

For Configurable I/O modules

  • I/O Functionality according to customer requirements 
  • Simulink® example models 
  • Simulink library 
  • Comprehensive documentation 

For Simulink-programmable FPGA I/O modules, as part of the Motion Control HDL I/O Blockset: 

  • Simulink blocks and the corresponding VHDL files to use code module functionality in the HDL Coder workflow 
  • Simulink library, a sample Simulink model and comprehensive documentation 


Supported I/O modules

  • All configurable and Simulink-programmable FPGA I/O modules featuring digital I/O lines  


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