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SPI FPGA Code Module

Configurable SPI Master and Slave support with Simulink driver blocks

This FPGA code module provides SPI master and slave support.

The code module can function as either master or slave, and multiple slave select lines can be implemented as required. Most typical applications are directly supported. Speedgoat offers a customisation service to meet any particular requirements you may have.

SPI sniffer functionality is provided by the SPI Sniffer FPGA code module.

An example timing diagram of the signal generated / read by the SPI FPGA code module

SPI FPGA code module timing diagram T 1 = Start delay (master only)
T 2 = Clock divider
T 3 = Inter-word delay (master only)
T 4 = Stop delay (master only)

This FPGA code module is normally delivered as part of a custom implementation with your selection of functionality and I/O count. Please contact us for further information.

Pricing information
We don't publish pricing information on our website. Upon request by e-mail or phone we can provide a complete price list covering our entire product portfolio in various currencies. We recommend that you get in touch with us to discuss your specific needs. We can then quickly provide you with a tailored quotation including technical and pricing information.


Included in delivery

  • Delivered as part of a HDL Coder integration package configured to your requirements
  • Simulink driver block
  • Test models
  • Comprehensive documentation

Supported target machines