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Speedgoat IO335 Analog Input and Differential Input Interfaces

Speedgoat IO335 Analog Input and Differential Input Interfaces — Front interfaces with 24 analog input and 3 differential input lines

Supported Modules

  • IO335-325k

Analog Input Interface

IO335 AI Data [0:23]

The IO335 I/O module provides 24 simultaneous 16-bit 5 MHz analog input channels. The corresponding IO335 AI Trigger and IO335 AI Valid must be selected as well.

  • 24 channels

  • Data Type: int16

  • Direction: input

DescriptionAI Input Voltage (Range ±5.14738)Digital Code
Full Scale Range (FSR)10.2948 V-
Least Significant Bit (LSB)157 µV-
Full Scale (positive)5.147223 V0x7FFF
FSR - 1 LSB5.147066 V0x7FFE
Mid-scale + 1 LSB157 µV0x0001
Mid-scale0.0 V0x0000
Mid-scale - 1LSB-157 µV0xFFFF
-FSR + 1LSB-5.147223 V0x8001
Full Scale (negative)-5.147380 V0x8000

IO335 AI Valid [0:11]

This mandatory port indicates when the analog input data is valid. The port signal is a single clock pulse of the design under test (DUT) frequency. Since the DUT can be set to run faster than the ADC, there will not necessarily be valid data available at every clock tick.

  • The AI Valid for the corresponding AI Data is mandatory

  • Data Type: boolean

  • Direction: input

IO335 AI Trigger [0:11]

This mandatory port triggers the conversion of the analog input. Ideally the trigger signal should be implemented as a single clock pulse of the design under test (DUT) frequency.

  • The AI Trigger for the corresponding AI Data is mandatory

  • Data Type: boolean

  • Direction: output

Differential Input Interface

IO335 Differential Input Channel [0:2]

The IO335 I/O module provides three differential input lines. All three input lines are implemented with a differential termination of 100 Ω. The differential voltage range allowed is ±200 mV to ±3.6 V.

  • Data Type: boolean

  • Direction: input

Interface Pin Mapping

The pin mapping for the IO335 I/O module is as follows:

Channel IO335 I/O Box: Samtec Connector PinIO335 I/O Box: RJ45/PinData TypeTarget Platform InterfacesBit Range Address FPGA Pin
Analog Input 196AI 1:4/2int16IO335 AI Data [0:23]Channel 1 (+)
94AI 1:4/1int16IO335 AI Data [0:23]Channel 1 (-)
Analog Input 290AI 1:4/6int16IO335 AI Data [0:23]Channel 2 (+)
88AI 1:4/3int16IO335 AI Data [0:23]Channel 2 (-)
Analog Input 384AI 1:4/5int16IO335 AI Data [0:23]Channel 3 (+)
82AI 1:4/4int16IO335 AI Data [0:23]Channel 3 (-)
Analog Input 478AI 1:4/8int16IO335 AI Data [0:23]Channel 4 (+)
76AI 1:4/7int16IO335 AI Data [0:23]Channel 4 (-)
Analog Input 572AI 5:8/2int16IO335 AI Data [0:23]Channel 5 (+)
70AI 5:8/1int16IO335 AI Data [0:23]Channel 5 (-)
Analog Input 666AI 5:8/6int16IO335 AI Data [0:23]Channel 6 (+)
64AI 5:8/3int16IO335 AI Data [0:23]Channel 6 (-)
Analog Input 760AI 5:8/5int16IO335 AI Data [0:23]Channel 7 (+)
58AI 5:8/4int16IO335 AI Data [0:23]Channel 7 (-)
Analog Input 854AI 5:8/8int16IO335 AI Data [0:23]Channel 8 (+)
52AI 5:8/7int16IO335 AI Data [0:23]Channel 8 (-)
Analog Input 948AI 9:12/2int16IO335 AI Data [0:23]Channel 9 (+)
46AI 9:12/1int16IO335 AI Data [0:23]Channel 9 (-)
Analog Input 1042AI 9:12/6int16IO335 AI Data [0:23]Channel 10 (+)
40AI 9:12/3int16IO335 AI Data [0:23]Channel 10 (-)
Analog Input 1136AI 9:12/5int16IO335 AI Data [0:23]Channel 11 (+)
34AI 9:12/4int16IO335 AI Data [0:23]Channel 11 (-)
Analog Input 1230AI 9:12/8int16IO335 AI Data [0:23]Channel 12 (+)
28AI 9:12/7int16IO335 AI Data [0:23]Channel 12 (-)
Analog Input 1395AI 13:16/2int16IO335 AI Data [0:23]Channel 13 (+)
93AI 13:16/1int16IO335 AI Data [0:23]Channel 13 (-)
Analog Input 1489AI 13:16/6int16IO335 AI Data [0:23]Channel 14 (+)
87AI 13:16/3int16IO335 AI Data [0:23]Channel 14 (-)
Analog Input 1583AI 13:16/5int16IO335 AI Data [0:23]Channel 15 (+)
81AI 13:16/4int16IO335 AI Data [0:23]Channel 15 (-)
Analog Input 1677AI 13:16/8int16IO335 AI Data [0:23]Channel 16 (+)
75AI 13:16/7int16IO335 AI Data [0:23]Channel 16 (-)
Analog Input 1771AI 17:20/2int16IO335 AI Data [0:23]Channel 17 (+)
69AI 17:20/1int16IO335 AI Data [0:23]Channel 17 (-)
Analog Input 1865AI 17:20/6int16IO335 AI Data [0:23]Channel 18 (+)
63AI 17:20/3int16IO335 AI Data [0:23]Channel 18 (-)
Analog Input 1959AI 17:20/5int16IO335 AI Data [0:23]Channel 19 (+)
57AI 17:20/4int16IO335 AI Data [0:23]Channel 19 (-)
Analog Input 2053AI 17:20/8int16IO335 AI Data [0:23]Channel 20 (+)
51AI 17:20/7int16IO335 AI Data [0:23]Channel 20 (-)
Analog Input 2147AI 21:24/2int16IO335 AI Data [0:23]Channel 21 (+)
45AI 21:24/1int16IO335 AI Data [0:23]Channel 21 (-)
Analog Input 2241AI 21:24/6int16IO335 AI Data [0:23]Channel 22 (+)
39AI 21:24/3int16IO335 AI Data [0:23]Channel 22 (-)
Analog Input 2335AI 21:24/5int16IO335 AI Data [0:23]Channel 23 (+)
33AI 21:24/4int16IO335 AI Data [0:23]Channel 23 (-)
Analog Input 2429AI 21:24/8int16IO335 AI Data [0:23]Channel 24 (+)
27AI 21:24/7int16IO335 AI Data [0:23]Channel 24 (-)
Digital Input 217 booleanIO335 Differential Input Channel [0:2]2 (+)
15 booleanIO335 Differential Input Channel [0:2]2 (-)
Digital Input 111 booleanIO335 Differential Input Channel [0:2]1 (+)
9 booleanIO335 Differential Input Channel [0:2]1 (-)
Digital Input 05 booleanIO335 Differential Input Channel [0:2]0 (+)
3 booleanIO335 Differential Input Channel [0:2]0 (-)

I/O Box

The pin mapping goes with the following I/O box: