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Unrivaled workflow integration with MATLAB and Simulink via Speedgoat software products

Speedgoat test systems support rapid real-time execution of control designs and plant simulations on CPUs and FPGAs from Simulink. FPGA execution is typically required for demanding closed-loop sample rates exceeding 20 kHz.

Software pre-requisites and recommendations for CPU and FPGA based workflows with Speedgoat test systems are as follows:

Speedgoat software to run Simulink models on multi-core CPUs

Software Description Distribution
I/O Blockset
(documentation 🔒)
Simulink block library allowing you to use Speedgoat hardware.

Included in delivery with each Speedgoat test system.

Accessible via the customer portal.

Configuration Files for Configurable I/O modules Configurable I/O modules allow you to define and redefine required I/O functionality and channel count.

Optional software.

Accessible via the customer portal.

Multiple configuration files can be used for each configurable I/O module, but only one at a time.

I/O Configuration Packages
(documentation 🔒)
Predefined configurations for configurable I/O modules.

Optional software.

Accessible via the customer portal.

Speedgoat software to run Simulink models on Speedgoat Simulink Programmable FPGAs

Software Description Distribution
HDL Coder Integration Package
(documentation 🔒)
HDL Coder Integration Packages enable you to run Simulink models on your Programmable FPGA I/O module using the HDL Coder™ workflow.

Mandatory software.

Accessible via the customer portal.

HDL I/O Blocksets:
CommunicationMotion ControlCOMPISO System Unit (CSU)
(documentation 🔒)

Simulink models for turnkey use of functionalities such as PWM, Quadrature, I2C, and interface to the COMPISO System Unit.

Optional software.

Accessible via the customer portal.

 

 
 

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