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Documentation
CONTENTS

Speedgoat IO3xx-2x Port Settings

Speedgoat IO3xx-2x Port Settings — The Speedgoat IO3xx-2x rear I/O conditioning module port settings

Library

  • >> speedgoatlib_hdlCoder_IO3xx

Description

This Speedgoat block performs the setup and configuration to use the Speedgoat I/O modules. To use this block, open the HDL Coder HDL Workflow Advisor and use it to generate a Simulink Real-Time interface subsystem. This block is located inside the generated Simulink Real-Time interface subsystem. The mask of this block controls the block parameters. Do not edit the parameters directly. The FPGA I/O module block descriptions are for information purposes only. The relevant parameters are promoted to the top level of the generated Simulink Real-Time interface mask.

Ports

This driver block has no input or output ports.

Parameters

FPGA Module Identifier - Unique identifier for FPGA I/O module

1 (default) | n

Enter a unique number. This setting must match the setting of the corresponding design under test (DUT) subsystem generated. This is usually only relevant in a multi-module model, as otherwise the default value 1 is applied. The module identifier ordinal sequence will also correspond to the ordinal sequence of the modules' positions on the PCIe bus. In this way such modules of the same device type can be uniquely identified. For this reason, if multiple modules of the same type are installed in the target machine and one module is not in use within a given model, a bus and slot for the modules which should be used must be specified.

Tab: Conditioning Plug-in
Conditioning Module - defines the rear I/O conditioning module

No plug-in | IO33x-21 | IO33x-22

Select the correct rear I/O conditioning module.

Port 1 to Port 7 - Pull Resistor

pull-up 3.3V (default) | pull-up 5.0V | pull-down | floating

The IO3xx-21 plug-in supports seven ports, which each have eight digital I/O lines. The I/O voltage (3.3 V or 5.0 V) and the pull resistor (pull-up, pull-down, floating) can be selected for each port. All of the ports are completely independent, but the direction of each port must be the same for all eight I/O lines. The direction of the I/O lines is implicitly given by the input and output ports used in the model.

Target Screen Output

This block does not produce any output on the target machine display.