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IO104 Usage Notes

IO104 Usage Notes — Usage information about the I/O module

Description

This section offers some detailed descriptions of common use cases for the IO104.

Continous Frame Based Closed-Loop

In this configuration, the burst trigger generator paces both input and output bursts. The Simulink model is driven by the "IO104 DMA INT" interrupt, so the execution is started shortly after the tigger signal.

With synchronized input and output frames we get a constant system latency of exactly two frame times.

The output signal will have no discontinuities or gaps.

One-Sample Closed-Loop DMA Operation (Audio)

In this configuration we use only one sample per frame. The sampling rate is defined by the burst trigger interval time, which is exactly 1/48kHz in this example.

Example Configuration Values

Main Parameters Value Comment
Sample Time -1 Inherit from model base rate, which is interrupt-driven.
Inter-Module Frame Synchronisation Initiator We are trigger initiator and we could sync other cards.
Frame Time (Burst Trigger Interval) 1/48000 We want a 48kHz sampling rate.
Auto calibration yes  
Analog Input Parameters Value Comment
Active Channels [1 2 5] We want to use input channels 1, 2 and 5
Voltage Range Ch[1 2 5 6] ±2.5V Our input signals are between -2.5V and +2.5V
Voltage Range Ch[3 4 7 8] ±10V We don't use them anyway.
Block Sample Time -1 Inherit from model base rate, which is interrupt-driven.
Frame Size 1 We want only one sample of each channel.
Use Frame Burst Trigger For Inputs yesThe input acquisition shall be started by the trigger.
Inter-Module Clock Synchronisation Initiator We use our internal input clock generator.
Input Sample Time 20/40320000 For the fastest possible acquisition time we chose the maximum sample rate of 2MSPS.
Block Sample Time -1 Inherit from model base rate, which is interrupt-driven.
Analog Outputs Parameters Value Comment
Active Channel Group [2 3 4] We use three output channels.
Voltage Range ±2.5V Our output signals are between -2.5V and +2.5V
Reset Vector 1 Set all outputs to default values before and after execution.
Initial Value Vector 0 Default value is 0V for all outputs
Frame Size 1 We update only one sample of each channel in each execution step.
Use Frame Burst Trigger for Outputs yesThe output sampling shall be started by the burst trigger.
Inter-Module Clock Synchronisation Initiator We use our internal input clock generator.
Output Sample Time 40/40320000 For the fastest possible acquisition time we choose the maximum sample rate of 1MSPS.
Block Sample Time -1 Inherit from model base rate, which is interrupt-driven.

Tweaking the latency

The system latency is defined by the burst trigger interval time plus the analog output settling time of 1µs. If the latency must exactly match the sampling interval, one should define multiple samples per frame on the input side and only use the last value in the model.

DMA Operation

Configuration for DMA

The Analog Input and Output blocks operate in DMA mode when one of the following conditions is satisfied:

  1. Interrupt driven execution

  2. In DMA mode the model must be based on the "IO104 DMA INT" PCI interrupt (picture below) or it must be placed in a triggered subsystem.

Interrupt driven execution

In DMA mode the model must be based on the "IO104 DMA INT" PCI interrupt (picture below) or it must be placed in a triggered subsystem.

Interrupt Source

The interrupt is always generated by the Analog input block's DMA completion. If that block is not present in the model, the driver uses a dummy input acquisition in the background.

Interrupt Timing and Latency

The interrupt is issued a few microseconds after the analog input has completed the sampling of one frame.

  • In continuous sampling mode (sampling time x frame size = frame time) the interrupt is issued a few microseconds after the trigger signal, when the last samples are transferred to memory. As the interrupt is starting the model execution, you should make sure that the Analog input block is the first block to be executed and that the Analog output block is executed before the next trigger occurs. Like this, a closed-loop operation with a precise latency of two frames times can be realized.

  • When the frame size is much smaller than what would fit into one frame time, only one sample for example, we can achieve a precise latency of only one sample.

Execution Time Estimation

The time needed by the driver to bring DMA data to the Analog input's output ports can be calculated like this: t = frame_size * number_of_channels * 4.046ns

The time needed by the driver to read the Analog output's input ports and send them to the DMA channel can be calculated like this: t = frame_size * number_of_channels * 3.647ns

These factors apply to a speedgoat performance real-time target machine running at 3.5GHz in multicore mode.

Synchronisation

The analog inputs, analog outputs and the frame burst trigger can all be configured independently as either initiators or targets.

An initiator can be connected to up to four targets.

Pin Name Being initiator means that the module… Being target means that the module…
OUTPUT CLK I/O …drives the signal down each time it clocks its own analog outputs. Clocks are generated by the internal rate generator hardware, using the Output Sample Time setting on the Setup block's analog outputs tab. …reads this pin as a clock source for its analog outputs. The internal rate generator is ignored.
INPUT CLK I/O …drives the signal down each time it clocks its own analog inputs. Clocks are generated by the internal rate generator hardware, using the Input Sample Time setting on the Setup block's analog inputs tab. …uses this pin as a clock source for its analog inputs. The internal rate generator is ignored.
TRIGGER I/O …drives the signal each time it triggers its own analog output and/or input frame burst. Triggers can be generated by the internal rate generator hardware, using the Frame Time (Burst Trigger Interval) setting on the Setup block's main tab. …uses the pin as a trigger input. The internal rate generator is ignored.