BiSS Sniffer FPGA Code Module

Configurable BiSS Sniffer support with Simulink driver block

This FPGA code module provides BiSS sniffer support. This allows the monitoring of communications between a BiSS master and slave (device) (e.g. rotary encoder or linear position sensor).

BiSS master and BiSS encoder FPGA code modules are also available.

About BiSS

BiSS (bidirectional / serial / synchronous) is an open-source standard which enables robust serial communication between controller, sensor and actuator. It is typically used to read rotary encoders and linear position sensors, and drive motor controllers.

Item ID	Product Name	Components
303MOT	Motion Control HDL I/O Blockset	Simulink blocks and the corresponding VHDL files to use code module functionality in the HDL Coder workflow Simulink example model Simulink library for configuration and utility blocks Comprehensive documentation
203XXA	Custom Implementation Package	Project-specific FPGA bitstream implemented with the required number of code module channels Simulink example model Simulink library Comprehensive documentation

This FPGA code module is available either as a custom implementation (CI) or Netlist (refer to the distribution options for details). Custom implementations (CI) are delivered with your selection of functionality and I/O count. Netlists are used in conjunction with HDL Coder. Please contact us for further information.

Pricing information
We don't publish pricing information on our website. Upon request by e-mail or phone we can provide a complete price list covering our entire product portfolio in various currencies. We recommend that you get in touch with us to discuss your specific needs. We can then quickly provide you with a tailored quotation including technical and pricing information.

Included in delivery

For our configurable FPGA I/O modules, offered as part of a Custom Implementation Package:

FPGA bitstream implemented according to customer requirements
Simulink^® example models
Simulink library
Comprehensive documentation

For our Simulink-programmable FPGA I/O modules, offered as part of the Motion Control HDL I/O Blockset:

Simulink blocks and the corresponding VHDL files to use code module functionality in the HDL Coder workflow
Simulink library, a sample Simulink model and comprehensive documentation