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IO337

High-Speed Simulink®-Programmable I/O Module for Power Electronics HIL Testing

The IO337 I/O module is an ideal fit for demanding power electronics testing applications, such as

  • Controller HIL testing of inverters, converters (e.g. MMCs), and motor drives.
  • Testing at ultra-high switching frequencies
  • Testing motor drives at rated power levels (Power HIL)

The IO337, based on an AMD® Zynq™ UltraScale+™ MPSoC with 653k logic cells, allows to emulate several motor drives on a single I/O module.

The IO337’s FPGA is equipped with 32 ultra-highspeed, low-latency analog channels enabling DAC outputs at 10 Msps and therefore allowing closed loop control rates / simulation step sizes of >1 MHz. 

The IO337 can be programmed directly from Simulink with automatic HDL code generation, using the HDL Coder™ workflow from MathWorks®. Highly dynamic models and I/O run directly onto the FPGA in deterministic real-time. The HDL Coder™ workflow also supports Simscape™ and Simscape™ Electrical™ models. All Power Electronics HIL test models featuring common topologies provided by Speedgoat have been tested and run seamlessly on the IO337 making it a turnkey solution.

Key Features

  • High-speed analog I/O: 8 inputs at up to 5 mega samples per second (Msps) and 32 outputs at up to 10 mega updates per second (Mups) for testing fast-switching systems.
  • Simulink integration: Direct model-based design workflow, from simulation to real-time testing.
  • Ultra-low latency: Ideal for closed-loop control and real-time HIL testing.
  • FPGA-powered flexibility: Simulink-programmable FPGA enables MHz-domain closed-loop applications.
  • Scalable workflows: Choose between FPGA-based (MHz) or configurable (up to 100 kHz) approaches.
  • Expandability: Add digital I/O, SFP transceivers, or resolver interfaces as needed.
  • Intermodule communication: AMD Aurora protocol for low-latency scaling across multiple modules.
  • Versatile Use-Cases: Designed to support demanding applications in power electronics, automotive, aerospace, and energy systems.
 
Physical  
Form factor PCIe
Power requirements +12 V: 1.3 A
Electrical interface PCI Express x4 Link (Base Specification 2.1)
Connector Front I/O Samtec - ERF8-050-01-L-D-RA-L-TR
Environmental  
Operating temperature -40 °C to +85 °C
Relative humidity 5 to 95 %, non-condensing
Analog Input  
Number of inputs 8 differential
ADC resolution 16 bit
Max ADC sample rate 5 Msps simultaneous
Maximum differential input voltage range IO337-325k-10V: ±20 V
Maximum operating voltage range per input pin IO337-325k-10V: ±10 V
Analog Output  
Number of outputs 32 single-ended
DAC resolution 16 bit
Update rate Max.: 10 MUPS (8 channels) Max.: 3.7 MUPS (32 channels)
Voltage range ±2.5 V, ±5 V or ±10 V
Output current 10 mA
FPGA  
FPGA chip AMD® Zynq™ UltraScale+™ MPSoC ZU11EG
Logic cells 653k
MGT  
Inter-module communication 8 MGT lines for the I/O interface extension
Inter-Module Communication Concept  
Concept 2x IO337 connected by an MGT cable
I/O Interfaces
IO337 - I/O Interfaces
I/O Interface Extensions
IO337-21 56x 3.3 V/5 V TTL I/O lines
IO337-22 24x 3.3 V/5 V TTL I/O lines and 32x RS422/RS485 I/O lines
IO337-24 2 resolver measurement channels, 40 3.3 V/5 V TTL I/O lines (of which 16 configurable as RS422/485)
IO337-32 Signal-conditioning I/O interface extension provides access to 4 MGT I/O lines at the front with 4 SFP+ cages
Item ID Product Name Components
2A3376 IO337-325k-10V
  • 1x IO337 I/O module with 653k logic cells with ±10V input voltage range
  • 1x 100-pin male ERDP to 100-pin male ERDP cable, (3.28 ft/1 m)
  • 1x IO337 Terminal Board
  • Driver block library for Simulink® Real-Time™
  • Simulink® test models
  • Comprehensive documentation and Simulink® example models
  • Installation into the real-time target machine
20337Z IO337 Configuration Package Configuration files for:
  • Rapid Control Prototyping
  • Hardware-in-the-Loop Testing
  • Communication
I/O Interface Extensions (Optional)
23x216 IO3XX-21
  • 1x IO3XX-21
  • 1x 68-pin male MDR to 68-pin male MDR cable, (6 ft/1.82 m)
  • 1x 68-Pin Female MDR Terminal Board
  • Installation next to the IO337 I/O module
23x226 IO3XX-22
  • 1x IO3XX-22
  • 1x 68-pin male MDR to 68-pin male MDR cable, (6 ft/1.82 m)
  • 1x 68-Pin Female MDR Terminal Board
  • Installation next to the IO337 I/O module
23x246 IO3XX-24
  • 1x IO3XX-24
  • 1x 68-pin male MDR to 68-pin male MDR cable, (6 ft/1.82 m)
  • 1x 68-Pin Female MDR Terminal Board
  • Installation next to the IO337 I/O module
23x326 IO3XX-32
  • 1x IO3XX-32
  • Installation next to the IO337 I/O module
HDL Coder™ Integration Package
3A37RL IO337-653k HCIP
  • It enables deploying Simulink algorithms to FPGAs
  • IO337-650k HDL Coder Run-Time License
  • HDL Coder™ Integration Package for the base module and available I/O interface extensions
HDL I/O Blocksets (Optional)
303MOT Motion Control HDL I/O Blockset
  • A bundle of motion control functionalities that can be used for the Simulink®-programmable workflow using HDL Coder™.
  • This package contains PWM generation and capture, and encoder measurement and emulation (Quadrature, SSI, BiSS, EnDat, Cam/Crank and Resolver Emulation) functionalities.
303COM Communication HDL I/O Blockset
  • A bundle of communication functionalities that can be used for the Simulink®-programmable workflow using HDL Coder™.
  • This package contains all communication protocol functionalities: SPI, I2C, SENT, Serial, and dShot.

Pricing information
We don't publish pricing information on our website. Upon request by e-mail or phone we can provide a complete price list covering our entire product portfolio in various currencies. We recommend that you get in touch with us to discuss your specific needs. We can then quickly provide you with a tailored quotation including technical and pricing information.
 
IO337: Configurable and Simulink-Programmable FPGA I/O Module

Included in the Delivery

Common Applications

Supported target machines

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