This signal conditioning module converts 56 of the 64 2.5V rear LVCMOS I/O lines of the IO3XX FPGA I/O modules to 3.3V/5V TTL. It also adds ESD and overvoltage protection, and supports output currents of up to 24mA.
The I/O is accessible via an MDR 68-pin connector at the front of the enclosure.
Voltage level (3.3 or 5V) and input/output direction is software configurable in seven groups of 8 bits.
Up to three I2C master FPGA code modules can be supported by this module module. I2C Slave support is available on request.
This plug-in can also be used to run parts of your real-time application with automatically generated HDL code using HDL Coder from MathWorks.